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Wafer Fab Processing

Semiconductor and integrated circuit developments continue to proceed at an incredible pace. The industry as a whole has gotten to this point of incredible complexity through the process of countless breakthroughs and developments in wafer fab processing. Today's wafer fab contains some of the most complex and intricate procedures ever developed by mankind. Wafer Fab Processing is a 4-day course that offers an in-depth look into the semiconductor manufacturing process, and the individual processing technologies required to make them. We place special emphasis on the basics surrounding each technique, and we delve into the current issues related to manufacturing the next generation devices. This course is a must for every manager, engineer and technician working in the semiconductor industry, using semiconductor components or supplying tools to the industry.

By focusing on the basics of each processing step and the issues surrounding them, participants will learn why certain techniques are preferred over others. Our instructors work hard to explain how semiconductor processing works without delving heavily into the complex physics and mathematical expressions that normally accompany this discipline.

Register for this Course

Course Dates | Location

November 3-6, 2025 | Phoenix, AZ

(Price available until Mon. Oct. 13)

February 23-26, 2026 | Munich, Germany

(Price available until Mon. Feb. 2)

Cost

$2,195

$2,095

$2,195

$2,095

Pay Via Credit Card

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Pay Via Purchase Order/Check

Please note: If you or your company plan to pay by wire transfer, you will be charged a wire transfer fee of USD 45.00.

Please email the printable registration form for public courses to us at the email address on the form to complete your order.

Additional Information

If you have any questions concerning this course, please contact us at info@semitracks.com.

Refund Policy

If a course is canceled, refunds are limited to course registration fees. Registration within 21 days of the course is subject to $100 surcharge.

What Will I Learn By Taking This Class?

Participants will learn basic, but powerful, aspects about the semiconductor industry. This skill-building series is divided into three segments:

  1. Basic Semiconductor Wafer Processing Steps. Each processing step addresses a specific need in IC creation. Participants will learn the fundamentals of each processing step and why they are used in the industry today.
  2. The Evolution of Each Processing Step. It is important to understand how wafer fab processing came to the point where it is today. Participants will learn how each technique has evolved for use in previous and current generation ICs.
  3. Current Issues in Wafer Fab Processing. Participants will learn how many processing steps are increasingly constrained by physics and materials science. They will also learn about the impact of using new materials in the fabrication process, and how those materials may create problems for the manufacturers in the future.

This course is a must for every manager, engineer, and technician working in the semiconductor industry, using semiconductor components, or supplying tools to the industry. Our instructors work hard to explain how semiconductor wafer processing works without delving heavily into the complex physics and mathematical expressions that normally accompany this discipline.

Course Objectives

  1. This course will provide participants with an in-depth understanding of the semiconductor industry and its technical issues.
  2. Participants will understand the basic concepts behind the fundamental wafer fab processing steps.
  3. This course will identify the key issues related to each of the processing techniques, and their impact on the continued scaling of the semiconductor industry.
  4. This course will offer a wide variety of sample problems that participants will work to help them gain knowledge of the fundamentals of wafer fab processing.
  5. Participants will be able to identify the basic features and principles associated with each major processing step. These include processes like chemical vapor deposition, ion implantation, lithography, and etching.
  6. Participants will understand how processing, reliability, power consumption and device performance are interrelated.
  7. Participants will be able to make decisions about how to construct and evaluate processing steps for CMOS, BiCMOS, and bipolar technologies.

Course Outline

DAY 1

  1. Basics and Fundamentals: Semiconductor Devices and ICs
    • Acronyms
    • Common Terminology
    • Brief History
    • Semiconductor Materials
    • Electrical Conductivity
    • Semiconductor Devices
    • Classification of ICs and IC Processes
    • Integrated Circuit Types
  2. Crystallinity, Crystal Defects, Crystal Growth
    • Crystallinity
    • Crystal Defects
    • Crystal Growth
    • Controlling Crystal Defects
  3. Basic CMOS Process Flow
    • Transistors and Isolation
    • Contacts/Vias Formation
    • Interconnects
    • Parametric Testing
  4. Ion Implantation 1 (The Science)
    • Doping Basics
    • Ion Implantation Basics
    • Dopant Profiles
    • Crystal Damage and Annealing
  5. Ion Implantation 2 (Equipment, Process Issues)
    • Equipment
    • Process Challenges
    • Process Monitoring and Characterization
    • New Techniques

DAY 2

  1. Thermal Processing
    • Overview of Thermal Processing
    • Process Applications of SiO2
    • Thermal Oxidation
    • Thermal Oxidation Reaction Kinetics
    • Oxide Quality
    • Atomistic Models of Thermal Diffusion
    • Thermal Diffusion Kinetics
    • Thermal Annealing
    • Thermal Processing Hardware
    • Process Control
  2. Contamination Monitoring and Control
    • Contamination Forms and Effects
    • Contamination Sources and Control
    • Contamination Characterization and Measurement
  3. Wafer Cleaning
    • Wafer Cleaning Strategies
    • Chemical Cleaning
    • Mechanical Cleaning
  4. Vacuum, Thin Film, and Plasma Basics
    • Vacuum Basics
    • Thin Film Basics
    • Plasma Basics
  5. Chemical Vapor Deposition 1 (Basics, LPCVD, Epitaxy)
    • CVD Basics
    • LPCVD Films
    • LPCVD Equipment
    • Epi Basics
    • Epi Process Applications
    • Epi Deposition Process
    • Epi Deposition Equipment

DAY 3

  1. Physical Vapor Deposition
    • PVD Basics
    • Sputter Deposition Process
    • Sputter Deposition Equipment
    • Al-Based Films
    • Step Coverage and Contact/Via Hole Filling
    • Metal Film Evaluation
  2. Lithography 1 (Photoresist Processing)
    • Basic Lithography Process
    • Photoresist Materials
    • Photoresist Process Flow
    • Photoresist Processing Systems
  3. Lithography 2 (Image Formation)
    • Basic Optics
    • Imaging
    • Equipment Overview
    • Actinic Illumination
    • Exposure Tools
  4. Lithography 3 (Registration, Photomasks, RETs)
    • Registration
    • Photomasks
    • Resolution Enhancement Techniques
    • The Evolution of Optical Lithography
  5. Etch 1 (Basics, Wet Etch, Dry Etch)
    • Etch Basics
    • Etch Terminology
    • Wet Etch Overview
    • Wet Etch Chemistries
    • Types of Dry Etch Processes
    • Physics and Chemistry of Plasma Etching

DAY 4

  1. Etch 2 (Dry Etch Applications and Equipment)
    • Dry Etch Applications
    • SiO2
    • Polysilicon
    • Al and Al Alloys
    • Photoresist Strip
    • Silicon Nitride
    • Dry Etch Equipment
    • Batch Etchers
    • Single Wafer Etchers
    • Endpoint Detection
    • Wafer Chucks
  2. Chemical Vapor Deposition 2 (PECVD)
    • CVD Basics
    • PECVD Equipment
    • CVD Films
    • Step Coverage
  3. Chemical Mechanical Polishing
    • Planarization Basics
    • CMP Basics
    • CMP Processes
    • Process Challenges
    • Equipment
    • Process Control
  4. Copper Interconnect, Low-k Dielectrics
    • Limitations of "Conventional" Interconnect
    • Copper Interconnect
    • Cu Electroplating
    • Damascene Structures
    • Low-k IMDs
    • Cleaning Cu and low-k IMDs
  5. Leading Edge Technologies and Techniques
    • Process Evolution
    • Atomic Layer Deposition (ALD)
    • High-k Gate and Capacitor Dielectrics
    • Ni Silicide Contacts
    • Metal Gates
    • Silicon on Insulator (SOI) Technology
    • Strained Silicon
    • Hard Mask Trim Etch
    • New Doping Techniques
    • New Annealing Techniques
    • Other New Techniques
    • Summary of Industry Trends

Instructional Strategy

Our courses are dynamic. We use a combination of instruction by lecture, problem solving, and question/answer sessions to give you the tools you need to excel. From the very first moments of the seminar until the last sentence of the training, the driving instructional factor is application. The course notes offer hundreds of pages of reference material that you can apply during your daily activities. Additionally, the opportunity to work through sample problems under the guidance of an expert instructor allows you to cement the concepts you learn through hands-on implementation.

Our instructors are internationally recognized experts. Our instructors have years of current and relevant experience in their fields. They're focused on answering your questions and teaching you what you need to know.

Instructor Profile

Christopher Henderson, President of Semitracks

Christopher Henderson

Christopher Henderson received his B.S. in Physics from the New Mexico Institute of Mining and Technology and his M.S.E.E. from the University of New Mexico. Chris is the President and one of the founders of Semitracks Inc., a United States-based company that provides education and semiconductor training to the electronics industry.

From 1988 to 2004, Chris worked at Sandia National Laboratories, where he was a Principal Member of Technical Staff in the Failure Analysis Department and Microsystems Partnerships Department. His job responsibilities have included failure and yield analysis of components fabricated at Sandia's Microelectronics Development Laboratory, research into the electrical behavior of defects, and consulting on microelectronics issues for the DoD. He has published over 20 papers at various conferences in semiconductor processing, reliability, failure analysis, and test. He has received two R&D 100 awards and two best paper awards. Prior to working at Sandia, Chris worked for Honeywell, BF Goodrich Aerospace, and Intel. Chris is a member of IEEE and EDFAS (the Electron Device Failure Analysis Society).

At Semitracks, Chris teaches courses on failure and yield analysis, semiconductor reliability, and other aspects of semiconductor technology.