Failure Mechanisms

Introduction

Package Level Failure Mechanisms

Introduction

This section covers reliability failure mechanisms in semiconductor components that are related to the package, or package and assembly process. It can be grouped into several categories: moisture and contamination, thermal degradation, and thermomechanical stress. Moisture and contamination contributes to a class of failure mechanisms. Moisture, in combination with certain materials, can lead to leakage and/or corrosion. Thermal degradation is a specific mechanism that falls into a broader category of thermal degradation. This mechanism is activated solely by temperature, although some researchers have observed that catalysts like Bromine or Humidity can influence the rate of failure. Intermetallic degradation usually results in voiding, that weakens the bond, eventually leading to elevated resistance, intermittent operation, or open circuits. Thermomechanical stress arises from the mismatch of coefficients of thermal expansion in the materials in the package. This can lead to specific problems like package cracking, die cracking, popcorning, bondpad cratering, and bond wire tensile breaks.

Diffusion and Bulk Defects

Introduction

This material covers diffusion and bulk defects. Diffusion and bulk defects are defects that occur in the semiconductor material. They can be caused by contamination, improper processing, stress, and other events. Although these defects can result in yield loss and marginal operation, they rarely pose a reliability risk, because the temperatures required to cause their behavior to change is quite high.

This material is further broken down into diffusion alignment problems, diffusion profile anomalies, masking defects, under/over-sized mask features, and crystal defects. For more information, click on the topic of interest to view a short presentation on the subject.

Dielectric Failure Mechanisms

Introduction

This material covers dielectric failure mechanisms. This includes the dielectrics used for the transistor gates and the dielectrics used to isolate the interconnect. Dielectric breakdown is a common failure mechanism and has been studied for many years by scientists and engineers. Dielectric breakdown affects the transistor gates. It can lead to increased leakage, reduced performance, or functional failures. Gate oxide breakdown can be the result of extrinsic items, like contamination or surface roughness, or can be time-dependent degradation of the oxide itself. This mechanism is activated by several factors. In thicker oxides electric field, temperature, and even energetic electrons and holes can lead to breakdown. In thinner oxides, the voltage across the oxide is the more predominant factor. This material represents the latest thinking on dielectric breakdown.

Certificate

Dielectric Failure Mechanisms Certificate

Interconnect Failure Mechanisms

Introduction

This material covers failures that occur in the IC interconnect system. Metallization failure is another topic that has been studied for many years by scientists. Metallization failures are common in integrated circuits and can occur because of stress or electromigration, as well as other mechanisms. This material represents the most current thinking regarding both electromigration, and stress voiding. Electromigration is the movement of atoms under high current densities. This mechanism is accelerated by temperature and current, and is also quite dependent on the grain structure and interfaces that surround the copper interconnect. This mechanism can lead to increased resistance or opens in lines, or in some cases, even shorts between adjacent lines. Copper electromigration is mitigated through design techniques to minimize current densities and through technological means by ensuring good interfaces between the copper metal and the surround seed and capping layers.

Transistor Failure Mechanisms

Introduction

This material covers reliability failure mechanisms in semiconductor components that are related to the transistor behavior. These mechanisms fall into several categories: hot carrier effects (HC), ionic contamination, and negative bias temperature instability (NBTI). Some mechanisms are well understood, like ionic contamination, while mechanism like NBTI are still poorly understood. This material represents the latest thinking on these mechanisms. Negative Bias Temperature Instability affects p-channel transistors. The charge build-up in the oxide and at the interface leads to degradation of the performance of the transistor, which in turn degrades the performance of the chip. This mechanism is accelerated by both temperature and the gate voltage. Currently, there are no good technological solutions to reducing NBTI, so engineers address this problem through design with lower voltages and appropriate switching architectures.

Use Condition Failure Mechanisms

Introduction

This section covers reliability failure mechanisms in semiconductor components that are related to use conditions or the environment. It can be grouped into two main categories: electrical overstress/electrostatic discharge and radiation effects. Other overstress subjects like latchup and snapback are also covered in this material.

Memory Failure Mechanisms

Introduction

Memory failure mechanisms are a class of mechanisms that affect the behavior of memory cells. In particular, this includes non-volatile memory charge loss, cycling-related degradation, stress-induced leakage current, and others.