Semiconductor Technology, Design and Testing (Online Version)

I have a large range of options for some chips, and very few for others. Which chips do I choose for my system? How do I choose the right component or make sure it is specified correctly?

These are very common questions for component engineers and system designers of electronics hardware. As circuits grow more and more complicated, engineers can easily find themselves overwhelmed with data or possible options. Also, with the wide spectrum of available chips on the market, the selection process can quickly become overwhelming even for the experienced engineer. We need a method for determining the important attributes of the semiconductor device.

The solution: Semiconductor Technology, Design and Testing, a course that covers the important topics regarding the process of selecting and specifying the proper chips for the new electronics system. By focusing on the fundamentals of the chip technology, design, and testing process, the class will give you the appropriate methodology to successfully identify and specify components for an electronic system, and then understand the information the semiconductor designer/manufacturer supplies regarding the component.

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1-Year Online Training Subscription
(Includes this and other materials.)

Cost

$600

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Please email the printable registration form for online training to us at the email address on the form to complete your order.

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What Will I Learn By Taking This Class?

This skill-building series is divided into five segments.

  1. The Major Types of Chip Technologies. Participants will learn about the major types of chip technologies. This includes the major IC categories like CMOS, BiCMOS, and Bipolar, along with other distinctions like LDMOS, BCD, etc. We will also cover the major power semiconductor device categories like Power MOSFETs, Power Bipolars, IGBTs, and Thyristors. In addition, we’ll discuss other technology developments like SOI and FinFETs.
  2. IC Design Tools. Participants learn about the various tools used in the IC design process. Not only will they learn about the 3 major EDA suppliers, but they will also learn about the design flow itself, and how chips are taken from concept through to a working design.
  3. ESD Design. Participants learn how designers protect a chip from overstress conditions like EOS and ESD. They will learn how to protect the inputs, outputs, and power supply terminals of the chip. They will also learn how the chip technology plays a role in the ESD robustness. They will also be introduced to the major standards for ESD.
  4. Components and Their Tolerances. Participants will learn about tolerances associated with both digital and analog components. The factors affecting tolerances include: design, manufacturing, stresses due packaging and circuit assembly, and use conditions such as temperature, They learn to identify key pieces of information that allow them to determine if they should use the component in their system, and potential interactions that might create a problem.
  5. IC Testing. Participants will delve into the IC testing process. They will follow the test development process through from the chip-planning phase through design and into the validation process. They will learn how the chip manufacturer characterizes the components and sets limits for the various parameters.

Course Objectives

  1. The seminar will provide participants with the ability to recognize the many chip technologies on the market.
  2. Participants will be able to determine which chip technology is the appropriate one for their application, ensuring that the technology they choose will have the greatest probability of success.
  3. The seminar will identify the critical tolerance parameters that can affect the use of an IC in a system.
  4. The seminar offers several videos of describing the design process, the wafer fabrication process and the assembly/testing process, so that the analyst can understand what actually occurs during the chip design and manufacturing process.
  5. The seminar will cover the IC design process and how the design flow happens.
  6. Participants will understand how chip designers protect sensitive circuits from ESD on semiconductor devices.
  7. Participants will gain an understanding of the testing process and how the chip company handles this.
  8. Participants will be able to determine if the chip will have appropriate test coverage to allow the chip to be used in their application.

Course Outline

Major Chip Technologies

  1. Introduction, Principles/Procedures
  2. Taxonomy of Chip Technologies
  3. CMOS
    • Evolution of CMOS
    • Common Technology Variations
      • Bulk Silicon
      • Silicon on Insulation
    • Transistor Style
      • Planar
      • FinFET
    • Advantages/Disadvantages
  4. Bipolar
  5. BiCMOS
    • Evolution of BiCMOS
    • Common Technology Variations
      • SiGe
    • Advantages/Disadvantages
  6. Other Variations
    • LDMOS
    • DECMOS
    • BCD (Bipolar CMOS DMOS)
    • Advantages/Disadvantages
  7. Memories
    • SRAM
    • DRAM
    • Flash Memory
    • Other Memory Types (e.g. Ferroelectric)
    • Advantages/Disadvantages
  8. Discrete Semiconductors
    • Small signal
    • Power MOSFETs
    • Power Bipolars
    • Thyristors
    • Technology varations (e.g. planar, trench, vertical, etc.)
  9. Which One is Correct for Which Application?
    • Considerations
    • Use conditions
    • Packaging
    • Cost

Design

  1. Overall Chip Design Process
    • System Level
    • Register Transfer Language (RTL) Level
    • Physical Layout
    • Formal Verification Process
  2. Electronic Design Automation (EDA) Tools
    • Major EDA Suppliers
      • Cadence
      • Synopsys
      • Mentor Graphics
      • Interoperability
    • Other Suppliers (Ansys, Ing.-Buro Friedrich, Keysight, Pulsonix, Silvaco, Solido, etc.)
    • Use Case
      • Strengths and weaknesses
      • Considerations
  3. ESD Design
    • High-Level Protection Concepts
    • Input Protection Circuits
    • Output Protection
    • Power Supply Protection
    • Technology Protection Methods
      • Materials
      • Layout
  4. ESD Standards
    • JEDEC/EDSA Joint Standard – HBM
    • JEDEC/EDSA Joint Standard – CDM
    • IEC61000-4-2
    • Others
  5. ESD Testing
    • ESD Test Systems
    • Transmission Line Pulse Testing
    • System Level Testing
    • Differences

Components and Testing

  1. Component Specifications
    • Voltage, Temperature, Frequency ranges
    • Performance Specifications
      • Digital (MIPS, FLOPS, functional behavior, etc.)
      • Analog (Stability, Gain, PSRR, CMRR, Slew Rate, etc.)
      • Mixed-Signal (Differential Non-Linearity (DNL), Integral Non-Linearity (INL), Millions of Samples Per Second (MSPS), etc.)
    • Parametric Specifications (Input Leakage, Output Leakage, Output Voltage, etc.)
    • Current Specifications (IDDQ, IQ, etc.)
  2. Which Ones Are Important?
    • Determining Sensitivities
      • Voltage
      • Temperature
      • Stress
      • Moisture
  3. Test Development Process
    • Planning
    • Design
    • IC Validation
    • Production
  4. Digital Design for Test
    • Quality Goals
    • Automatic Test Pattern Generation
    • Fault Grading
  5. Analog Design for Test
    • Basic Concepts
    • Differences between Digital and Analog Test
    • Examples
  6. Production Test
    • Goals
    • Issues for Customers
  7. Conclusion