Dynamic Random Access Memory is key to many electronic systems. The density and performance make it the memory of choice for many systems, including personal computers, workstations, embedded computing, game consoles, and more. As memory performance increases, the number of DRAM architectures and options available increase. Electronic system designers need to understand the options for integrating these memories into their systems and how to test them to ensure proper operation. Furthermore, many companies are beginning to offer embedded DRAM for use in System-on-a-Chip (SoC) applications. In these devices, testing becomes even more of a challenge. DRAM Design, Technology and Testing is an intensive 1-day course designed to provide this understanding to system-level designers, test engineers, product engineers, SOC system designers that plan to or are considering using embedded DRAM technology, and other individuals dealing with DRAM technology. Our instructor is an expert in the area of DRAM Design and Testing, and has spent more than a decade working specifically on these devices. He is uniquely qualified to give you and understanding of the issues associated with DRAM.
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Martin Versen studied physics at the Ruhr-University Bochum, Germany and received his PhD in 2000 in electrical engineering for his work on single electron devices based on InAs quantum dots. He joined Qimonda's mother company, Infineon Technologies, in 2000 as product engineer in Munich, Germany, and Williston, VT being responsible for test coverage and customer return analysis in the commodity memory department. He was a senior staff engineer product and test and team leader of the root-cause analysis team in Munich from 2005 to 2009. Since 2009 he has been a professor of Engineering Sciences at The Rosenheim University of Applied Sciences.