Semiconductor and integrated circuit developments continue to proceed at an incredible pace. For example, today's microprocessor chips have one thousand times the processing power of those a decade ago. These challenges have been accomplished because of the integrated circuit industry's ability to track something known as Moore's Law. Moore's Law states that an integrated circuit's processing power will double every two years. This has been accomplished by making devices smaller and smaller. The industry is also pushing to use semiconductor devices in an increasing array of applications. To accomplish this, the industry is adopting a number of new packages that incorporate polymers to reduce cost, reduce weight, and increase performance. Polymers and FTIR is a 1.5-day course that offers detailed instruction on the technology issues associated with polymers in semiconductor packages and electronics. We place special emphasis on current package technology issues like interposers, substrates, stress relief layers, and tools for package analysis. This course is a must for every manager, engineer, and technician working in semiconductor packaging, using semiconductor components in high performance applications or non-standard packaging configurations, or supplying packaging tools to the industry.
By focusing on current issues in packaging technology, participants will learn why advances in the industry are occurring along certain lines and not others. Our instructors work hard to explain semiconductor packaging without delving heavily into the complex physics and materials science that normally accompany this discipline.
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Please note: If you or your company plan to pay by wire transfer, you will be charged a wire transfer fee of USD 45.00.
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Participants learn basic but powerful aspects about semiconductor packaging. This skill-building series is divided into four segments:
By using a combination of instruction by lecture, classroom exercises, and question/answer sessions, participants will learn practical information on semiconductor packaging and the operation of this industry. From the very first moments of the seminar until the last sentence of the training, the driving instructional factor is application. We use instructors who are internationally recognized experts in their fields that have years of experience (both current and relevant) in this field.
Shalabh received his B.A. in Chemistry from Carthage College in Kenosha, Wisconsin, and subsequent Doctorate in Polymer Science and Engineering, 1997, from the Department of Polymer Science, University of Massachusetts, Amherst. Shalabh joined Intel in 1997 working in the quality and reliability group supporting failure analysis of packages and polymer materials. He focused on thermo-mechanical material characterization (focus on polymers) to understand their constitutive behavior, as well as to establish techniques to determine polymer component reliability in semiconductor applications. He led various Intel teams to develop and improve polymer materials for specific semiconductor applications that were capable of meeting stringent operating requirement, as well as identifying polymeric materials to enable new substrate technologies. Currently, Shalabh's focus has shifted to development of reliable equipment used to test Intel CPUs to ensure that product quality and reliability is not compromised by the tester fleet in a high volume manufacturing environment. Shalabh has published over 25 internal and external articles, has a patent, and has several internal technical achievement awards.