In this presentation, we discuss voltage contrast, one of a number of techniques that use scanning electron microscopy to aid in fault isolation. Voltage contrast can be observed as changes in the intensity of the secondary electron image.
Voltage contrast is used in four distinct ways in failure analysis. These include passive voltage contrast, biased voltage contrast, capacitive-coupled voltage contrast, and electron beam probing.
Let’s first discuss passive voltage contrast. Although analysts have known about voltage contrast effects since the 1940s, the first work on passive voltage contrast was not published until 1990. Passive voltage contrast (PVC) uses the charge injection of the electron beam and the connections--or lack thereof--of features to a grounded connection on the circuit. PVC uses the electron beam to either charge a conductor positively or negatively at low accelerating voltages that are between 500 volts and 2 kilovolts. A floating conductor--such as an unconnected polysilicon gate--acquires a voltage potential similar to that of the beam. For instance, if the beam charges the gate negative, the gate appears brighter in the image because it emits more secondary electrons to achieve equilibrium. A polysilicon gate with a defect such as a short to the substrate produces a dark contrast because the conductor does not charge negatively. As a result, the conductor emits fewer secondary electrons. Passive voltage contrast is a valuable technique for locating shorted gates, single bit EEPROM floating gate failures, and open interconnect.
Figure 1 is an image generated using the passive voltage contrast technique. This image shows a small region in an electrically erasable programmable read only memory or EEPROM. The overlying metal interconnect has been removed in this sample, revealing the floating gates and contacts to the substrate. A portion of the interlevel dielectric is still intact, however. In a functional EEPROM cell, the floating gate should be electrically isolated from the rest of the circuit by either the gate oxide or the tunnel oxide, depending on the design and processing. The arrow indicates a floating gate that is shorted to the substrate. Notice that the contrast is dark. In order to obtain the image through the remaining interlevel dielectric, an accelerating voltage of 5kV was used. In order for the technique to work, the charge from the beam must penetrate to the structure of interest.
Figure 2 is another example of the passive voltage contrast technique. The image shows a metal contact chain with an open. The arrow indicates the location of the open, which is not directly visible through SEM inspection because the open is at the metal to silicon contact. However, the passive voltage contrast technique shows the location of the open quite nicely. One end of the daisy chain is connected to ground while the other end is not connected. This means that the portion of the chain to the lower left of the open will be floating. The electron beam will charge this portion of the chain negatively, causing it to emit more secondary electrons and appear brighter. This sample was deprocessed to expose the metal chain. The accelerating voltage used to examine this structure was 2kV.
In Figure 3 we show another example of how passive voltage contrast can be used to localize defects. The integrated circuit has been stripped to the metal-1 polysilicon interlevel dielectric. In the image, the contacts to the n-channel transistors are dark because they are tied to the substrate, which is grounded to the stage. The contacts to the p-channel transistors are bright because they are tied to the well, which is isolated from the substrate by a reverse-biased diode. The contacts to the polysilicon gate are also bright, except for the one dark contact indicated by the arrow. The gates should be bright, since they are isolated from the substrate and can charge in the presence of the electron beam. The dark gate exhibits a leakage path to the substrate.
Passive voltage contrast can also be implemented and observed in a Focused Ion Beam (FIB) system. The cross-sectional image in Figure 4 shows contrast between a metal-2 line that is grounded and a metal-1 line that is floating. One can also see a grounded polysilicon line in the image.
In Figure 5 are several passive voltage contrast images of a test structure taken on a focused ion beam system. In the upper left, the secondary electron image clearly shows a discontinuity in the test structure. The secondary ion image in the lower left does not show this feature. Secondary ions do not exhibit the voltage contrast effect since they are much heavier and less influenced by the charge and electric fields on the device. A cross-sectional image of the two vias in question is shown on the right. Notice that the via on the left shows good tungsten coverage, while the via on the right has no tungsten in the via.
Passive voltage contrast can also navigate planarized integrated circuits. The images in Figure 6 show two successive scans of the focused ion beam on a portion of a planarized circuit. As the beam scans across the device, it leaves a charge behind. The capacitance between the metal interconnect and the top surface creates an image charge that is somewhat different than the areas free of interconnect, producing contrast. The uppermost layer of metallization and the layer beneath show up clearly in the first scan on the left, while only the top layer shows up in the second scan on the right. After the beam scans the area, the effect is neutralized for the weaker capacitance between the lower metal and the surface. After several more scans, the effect for the top metal disappears as well.
Passive voltage contrast is now being used in yield applications. PVC is a powerful way to identify defects during the wafer fabrication process. Both KLA-Tencor and Applied Materials sell electron beam-based inspection and review tools. These tools can make use of passive voltage contrast to identify opens, shorts, contamination, and other types of defective conditions.
Although not used extensively, passive voltage contrast is nonetheless a powerful technique for isolating defects. Unlike the other voltage contrast techniques, passive voltage contrast does not require electrical connection to the pins. All you need is the ability to ground the substrate of the device to the stage. The technique can be performed in a variety of scanning electron microscopes and focused ion beam systems, as long as equipment can load a grounded sample and tilt the sample toward the secondary detector to increase the contrast. If passive voltage contrast is performed at low beam energies, the technique is non-destructive. Energies below 2kV reduce the chances of electrostatic discharge and damage from electron beam irradiation. One disadvantage to the technique is that one will likely have to remove overlying layers in a fully processed sample in order to expose the features of interest. Most of the examples shown earlier were deprocessed down to the metal layers or the gate regions of interest. Finally, passive voltage contrast requires interpretation on the part of the analyst to determine the nature of the defect. PVC does not necessarily highlight the defect itself, but rather it indicates an electrical problem on the node. Knowledge of the layout and design of the circuit can greatly aid in finding out the problem.
To be continued in December.
An important aspect of statistical analysis is the confidence one has in the results. In general, the more data points one has, and the more they lie along a particular regression line, the greater the confidence one has in the results. One can visualize these graphically using confidence and prediction bands.
The equations shown here are the equations one uses to generate confidence and prediction bands. The confidence bands are given by this equation, and the prediction bands are given by this equation: where Y is the predicted y value, ta is the standard deviation associated with the confidence value, n is the number of data points, Xm is the sample mean, SSxx is the sum of squares of the deviation of the points from the mean, SE is the standard error, or the square root of the sum of squares divided by n minus 2.
Here we show data points plotted on a lognormal plot. We then show the prediction line in red, and the prediction bands in cyan. We also show the confidence bands for the 95% confidence level. The prediction bands form a measure of the scatter in the data. The more scatter in the data, the wider the prediction bands. The confidence bands (in purple) form a measure of the slope of the best fit line. The more the bands widen away from the T50 point, denoted as 0.0% CDF in this graph, the less confidence we have that the slope of the line is correct. Put another way, the slope of the best fit line, with 95% confidence, falls within the purple lines. This method of graphically viewing the bands can allow us to visually determine the quality of our data.
Q: In JESD47 there is a figure (Figure A) that shows a table for HTDR with cycle count (100% spec, 10% spec, and <10% spec). What does this mean?
A: Spec is referring to the maximum number of specified cycles. For example, if a non-volatile memory is rated for 100,000 program/erase cycles, 100% spec. would be applying the test such that the component reaches 100% of its maximum rated program/erase cycles, or 100,000 in this case.
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