This month we will conclude our two-part series that provides an overview of chemical vapor deposition and the basic principles behind the technique. Process engineers usually refer to chemical vapor deposition by its short name CVD so we will refer to it that way as well.
One method for achieving higher reaction rates is to increase the gas phase mass transfer coefficient. This can be accomplished by inducing a laminar flow across the wafer. The figure here depicts the velocity of the gas across the wafer surface. A boundary layer exists near the surface of the wafer. This means that the velocity of the gas at the wafer surface will be zero. This effectively limits the film growth rate at higher gas flow rates (see Figure 1 on the next page).
Gas transport to the wafer is a key aspect of chemical vapor deposition. The mean free path of the gas molecules is a key component of the gas transport process. The lower the pressure is, the greater the mean free path. However, lower pressure also means fewer reactant molecules. Manufacturers of CVD systems design their systems such that gas flow is optimized over the wafer surfaces. The placement of gas inlets, wafers, and exhaust, the use of various reactants, the use of single wafer processing versus batch processing, and the use of thermal or plasma-enhanced chemical vapor deposition all affect the chamber design. There are two types of systems available for chemical vapor deposition: batch systems and single wafer systems. In a batch system, the wafers are loaded as a group into a furnace tube. The reactant gas is introduced at one end of the tube, and the exhaust gases are purged at the other end of the tube. In a single wafer system, the gas is introduced through a showerhead over the wafer, and the exhaust gases are purged at the side of the wafer.
CVD processes can be sub-divided into three types: atmospheric pressure CVD (or APCVD), low pressure CVD (or LPCVD), and plasma enhanced CVD (or PECVD). Both LPCVD and PECVD operate in a sub-atmospheric pressure regime, while APCVD operates at atmospheric pressure, as one would expect given the name. APCVD and LPCVD use thermal energy to drive the reaction, while PECVD uses plasma energy along with thermal energy to help lower the overall reaction temperature. These tables show the applications for the three types of CVD processes.
There are four variants of chemical vapor deposition used in the semiconductor industry. Pure thermal chemical vapor deposition uses elevated temperatures to drive the reaction at the surface. Plasma Enhanced or PE-CVD is often used for faster reaction rates. Not only is energy for the reaction supplied by heat, but it is also supplied through RF energy. High Density Plasma or HDP-CVD is a recent development that is a variant of PE-CVD processing. In these processes, plasmas are struck at very low pressures in electron cyclotron resonance or inductively coupled plasma chambers. The gases, usually argon and oxygen, are then drawn by an electric field towards the wafer surface, where the oxygen reacts with silane. As a result, gap fill is improved, excellent high quality SiO2 films are produced, and there is a net reduction in overall thermal budget. Rapid thermal processing is increasingly used as well to reduce the overall thermal budget during processing. Rapid thermal processing CVD works similarly to rapid thermal oxidation. The temperature ramps up quickly when the heat lamps are turned on, and ramps down quickly when the heat lamps are turned off.
In an atmospheric pressure CVD reaction, the reaction rate is mass transfer limited. In this situation the flow of the gas must be uniform. This means that wafers cannot be placed too close to each other; otherwise they will interrupt the flow of the reaction gas. Historically, process engineers used APCVD to grow thicker dielectrics like Borosilicate glasses and silicon nitride layers. With the advent of more advanced technologies with their thinner layers and lower processing temperatures, the use of APCVD has diminished. Engineers do still use the technique for some specialize operations, like epitaxial silicon growth and growth of silicon carbide films on silicon or silicon nitride substrates.
In a low pressure CVD reaction, the surface reaction is reaction rate limited. In order to grow the appropriate thickness, the temperature and time must be closely controlled. The reactions are heterogeneous in order to minimize particulate generation. LPCVD operates in a surface reaction rate limited regime, and since this eliminates limitations associated with mass transport, the equipment can process larger batches of wafers. This is an important consideration in a high-volume factory. The pressure in these systems ranges from around 0.25 to 1 Torr and operates at temperatures between 550 and 800°C. Given the high temperatures, this technique cannot be used after aluminum deposition on the chip. There are two types of process tools that employ LPCVD: hot-wall and cold-wall. Historically, engineers used hot wall reactors to process large groups of wafers simultaneously. Newer systems that cluster operations together are single wafer systems using cold-wall reactor technology.
Plasma Enhanced or PE-CVD is often used for faster reaction rates. Not only is energy for the reaction supplied by heat, but it is also supplied through RF energy. This technique operates in a temperature regime that makes the surface reaction rate the limiting factor. High Density Plasma or HDP-CVD is a recent development that is a variant of PE-CVD processing. In these processes, plasmas are struck at very low pressures in electron cyclotron resonance or inductively coupled plasma chambers. The gases, usually argon and oxygen, are then drawn by an electric field towards the wafer surface, where the oxygen reacts with silane. As a result, gap fill is improved, excellent high quality SiO2 films are produced, and there is a net reduction in overall thermal budget.
This table summarizes the three types of CVD processes. All three CVD processes are heterogeneous reactions, but beyond that, each type has its own advantages and disadvantages. We cover these advantages and disadvantages in more detail in our Online Training Systems, with sections on the specific CVD techniques.
Let’s summarize what we have learned. In a generic CVD process, the reactant gases are introduced into the reaction chamber. These gases diffuse through the boundary layer to the wafer surface. Once the gases reach the surface, we refer to them as reactants or adatoms, and they adsorb on the wafer surface. These adatoms migrate to the growth sites where they react with the surface to form the film. This reaction produces a solid film and gaseous by-products, and these reactions might be pyrolysis, reduction, or oxidation reactions. The gaseous by-products desorb from the surface, diffuse through the boundary layer back into the gas flow region where they are exhausted.
Redistribution and bump is a common process for chip-scale packages. The idea is to even out the distance between connections by adding an extra level of interconnect on top of the wafer to “redistribute” the connections such that they line up for various package formats like Ball Grid Array packages, Quad Flat No-Lead Packages, and so on.
The main advantage to this technology is that one silicon design can be used for multiple applications, or be placed in multiple packages. The disadvantages include the fact that: multiple mask layers for the redistribution interconnect require higher tool cost, multiple layer operations can increase process and materials cost by two to three times, and the increased process steps and operations lower the final yield. Nonetheless, this is a popular option for certain types of parts, where a new layout might be more costly than the costs of the redistribution layer materials and processing.
Q: Why is there the option to perform Latchup Testing at both room and hot temperature? When should I test for latchup at hot temperatures?
A: JESD78 defines two classes of Latchup testing: Class I and Class II. Class I testing is at 25°C, whereas Class II testing is at the maximum operating temperature of the component. For most components latchup susceptibility increases with temperature, so it makes sense to test at high temperatures, especially if the end application includes scenarios where one might operate at high temperatures, like in an automobile for example. Many companies will perform latchup testing at both 25°C and maximum operating temperatures just to be on the safe side.
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Copper Wire Bonding Technology and Challenges on May 13-14, 2013 (Mon.-Tues.) in Munich, Germany
Failure and Yield Analysis on May 13-16, 2013 (Mon.-Thurs.) in Munich, Germany
MEMS Technology on May 15-16, 2013 (Wed.-Thurs.) in Munich, Germany
Failure and Yield Analysis on June 3-6, 2013 (Mon.-Thurs.) in San Jose, CA, USA
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