IC Packaging Design and Modeling

The semiconductor industry faces an increasing paradox: making devices smaller and smaller, driving prices down, and increasing the array of applications, despite increasing challenges related to component packaging. Semitracks' 3-day IC Packaging Design and Modeling course faces these challenges by offering detailed instruction on the design and modeling of semiconductor packages. We especially emphasize package interactions with the die.

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Please fax the printable registration form for public courses to us at 1-866-205-0713 to complete your order.

Additional Information

For dates and locations in South East Asia, please contact us at se-asia.courses@semitracks.com.

Refund Policy

If a course is canceled, refunds are limited to course registration fees. Registration within 21 days of the course is subject to $100 surcharge.

What Will I Learn By Taking This Class?

By focusing on the fundamentals of packaging design and modeling, you'll learn why advances in the industry are occurring along certain lines and not others.

This skill-building series is divided into four segments:

  1. Packaging Design Overview. Participants learn the fundamentals of packaging design. They learn why modeling has become critical to semiconductor packaging for today's designs.
  2. Mechanical Simulations. Participants learn the fundamentals of displacement, strain, stress, and energy. They learn how to leverage St. Venant's Principle and apply fracture mechanics to a problem.
  3. Thermal Simulations. Participants learn heat transfer modeling. They also learn about steady-state and transient thermal modeling. The instructor also explains industry standard and compact thermal models.
  4. Modeling Semiconductor Packages. Participants learn about the software used for modeling a variety of aspects of semiconductor packaging. They see a number of examples of current modeling tools used by package design experts.

This course is a must for every manager, engineer, and technician working in semiconductor packaging, using semiconductor components in high performance applications or non-standard packaging configurations, or supplying packaging tools to the industry. Our instructors work hard to explain semiconductor packaging without delving heavily into the complex physics and materials science that normally accompany this discipline.

Course Objectives

  1. The seminar will provide participants with an in-depth understanding of semiconductor packaging design and its technical issues.
  2. Participants will understand the basic concepts behind thermal and mechanical simulations of packages.
  3. The seminar will identify the key issues related to the continued growth of the semiconductor industry. This includes the need for high power dissipation and designs that can mitigate increasing die fragility because of low-k dielectrics.
  4. The seminar offers a wide variety of sample modeling problems that participants work in class to help them gain knowledge of the fundamentals of packaging modeling.
  5. Participants will be able to identify basic and advanced principles for mechanical stress and thermal diffusion.
  6. Participants will understand how package reliability, power consumption, and device performance are interrelated.
  7. Participants will be able to make decisions about how to construct and evaluate new packaging designs and technologies.
  8. Participants will also be introduced to wafer-level simulations, which are increasingly necessary with the advent of low-k dielectrics.

Instructional Strategy

Our courses are dynamic. We combine instruction by lecture, problem solving, and question/answer sessions to give you the tools you need to excel in packaging design and modeling. From the very first moments of the seminar until the last sentence of the training, the driving instructional factor is application. The course notes offer hundreds of pages of reference material that you can apply during your daily activities.

Our instructors are internationally recognized experts. Our instructors have years of current and relevant experience in their fields. They're focused on answering your questions and teaching you what you need to know.

Instructor Profile

Steve Groothuis

Steve Groothuis

Steve Groothuis received a Bachelor's in Physics (1983) from Michigan State University and Masters in Physics (1991) from the University of Texas. He began performing semiconductor package development, design, testing, and simulation in the Central Packaging Group, Texas Instruments in Dallas in 1983 as a Group Member of the Technical Staff. Prior to leaving TI, he managed the engineering staff in TI's Advanced Semiconductor Packaging Lab. In 1997, he was a Multiphysics Industry Specialist for ANSYS, Inc., defining Computer-Aided Engineering simulation software market plans, strategic accounts management, electronics packaging, MEMS device simulation initiatives, and product development for the electronics industry. From 2000-2008, he was with Micron Technology in positions from Senior Package Engineer in the Assembly and Packaging Department to Technology CAD and Analysis Manager in the Process RD Department at Micron Technology. His responsibilities included working with device and process simulations for new cell designs, supporting most aspects of semiconductor package simulations, and assessing new technology.

Currently, Mr. Groothuis is a Principal Consulting Engineer with SimuTech Group, Inc. He is actively involved in developing and winning new business opportunities for Finite Element Analysis (FEA) and Computational Fluid Dynamics (CFD) consulting projects. His efforts are focused on vertical markets such as Microelectronics, Semiconductor Packaging, Wafer Fabrication, NEMS/MEMS, Nanotechnology, Solar Energy, Wind Energy, and Consumer Electronics.

He has published over 30 papers at various conferences in semiconductor packaging, reliability, and numerical analysis. Mr. Groothuis is a Senior Member of the IEEE and has participated in ASME and JEDEC standards committees.